1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and particularly to a semiconductor device having wires passing through substrate of a device, such as a packaged semiconductor device in which a solid-state imaging device or the like are hermetically sealed, and a method for manufacturing the same.
2. Description of Related Art
As one example of miniaturization of a solid-state imaging device, a method has been disclosed in Japanese Patent Application Publication No. JP 2006-128713 (Patent Document 1), in which an adhesive layer is formed at a peripheral portion outside an imaging element area, and a transparent plate such as glass is disposed on top of the solid-state imaging element, and fixed and sealed by the adhesive layer, to keep the imaging element area airtight.
As a method for extracting an external electrode of the solid-state imaging element, a through opening reaching a pad electrode which is made from aluminum or the like and is disposed on an active surface is formed from a surface opposite to the active surface of the solid-state imaging element by a dry etching method or the like, an insulating layer for keeping insulation from a silicon substrate forming the solid-state imaging element is formed on an inner wall portion of the through opening, and then a conductive layer made from copper or the like allowing electrical connection with the pad electrode, is formed in a manner inner part of the through opening is filled or deposited to a sidewall of the through opening.
In this way, by extracting the external electrode from a back surface of the active surface, packaging of the solid-state imaging device can be realized in the same size as the solid-state imaging element, to enable downsizing of the solid-state imaging device.
Meanwhile, as high-speed, multi-function processing of the solid-state imaging element is pursued, issues are known that heat developed in the solid-state imaging element itself causes heat noise in the solid-state imaging element and a temperature gradient at a pixel section degrades characteristic of shading, or the like.
For example, in many CMOS solid-state imaging elements, peripheral circuits such as an input/output circuit and a comparator are typically arranged around the pixel section, and the temperature gradient occurs at the pixel section due to heat generated by the input/output circuit and the comparator.
For example, during operation at a frame rate of 60 fps, a temperature gradient of 2 degrees occurred at the pixel section due to heat generated at the peripheral circuit section. Such a temperature gradient is increased as frame rate and functions of the peripheral circuits are increased, and at the worst case, imaging characteristics may be greatly affected.
For issues relating to such temperature, a method has been disclosed in Japanese Patent Application Publication No. JP 2000-353800 (Patent Document 2), in which the temperature gradient is made uniform by changing the layout of circuit blocks.
Furthermore, in Japanese Patent Application Publication No. JP 2006-229043 (Patent Document 3), another method has been proposed in which anti-heat measure is taken without use of a cooler by forming a heat-radiating via in a package immediately below an amplifier being a heat generating section of a solid-state imaging element.
Furthermore, in Japanese Patent Publication No. 3655232 (Patent Document 4), still another method has been disclosed in which anti-heat measure is taken by forming grooves for insulating heat from a heat generating section on an active surface side of a solid-state imaging element.